1. Field of the Invention
The present invention generally relates to an electrostatic discharge (ESD) protection circuit. More particularly, the present invention relates to an ESD protection circuit adapted for high-speed input pads.
2. Description of Related Art
Electrostatic discharge is a phenomenon of releasing electrostatic charges from non-conductive objects. The phenomenon causes damage to devices and circuits in integrated circuits. For example, a person walking over a carpet can generate electrostatic charges of hundreds or thousands of voltage under high humid environment. Under dry environment, electrostatic charge of more than ten thousand voltages is generated. In packaging or testing machines, static charge of hundreds or thousands of voltages is generated as well. When objects like human bodies or machines are in contact chips of integrated circuits, electrostatic charge is discharged into the chips. The electrostatic discharge pulse can damage the integrated circuits of the chips.
In order to prevent damage caused by electrostatic discharge, electrostatic discharge (ESD) protection circuits are designed and applied to integrated circuits. There are a variety of traditional designs of the ESD protection circuits. One of them is the application of MOS transistors. Although the ESD protection circuit with MOS transistors is capable of discharging electrostatic charges, it needs a larger area and therefore occupies larger space. The larger circuit area of the traditional ESD protection device obviously result in loading effect due to parasitic capacitance. As a result, signal transmission speed is adversely affected. For the devices requiring high-speed or high-voltage input, the loading effect has to be suppressed.
Another prior art ESD protection circuit includes diodes and MOS transistors in the circuit design. Generally, diodes have excellent electrical conduction efficiency. Although the diodes are capable of resolving the loading effect caused by parasitic capacitance, diodes, however, cannot discharge electrostatic charges. Due to this disadvantage, the use of MOS transistors is still required. However, the use of MOS transistors in the ESD protection circuit requires a large area. When MOS transistors are designed in the ESD protection circuit, they are usually designed close to input pads. The design of the ESD protection circuit including MOS transistors is complicated and this design inevitably increase of the circuit area.